#	This is the file "instr.key", which says what the operand-list keys
#	mean.

#	Comments are as described in "instr.set".
#	Additionally, a semi-colon allows comments in data lines.

#	Keys may be one or two characters.

#   v1.09: - for D and E: OP_16 changed to OP_1632.
#          - for S8: OP_IMM8 changed to OP_IMMS8.
#          - key L isn't used anymore (was used for 32bit LOOPx).
#   v1.18: - keys rearranged, they are now always 2 hex digits.
#          - ';' comments added
#   lDebug: added movntq, MMX instruction set (51+)

# Usage of the works is permitted provided that this
# instrument is retained with the works, so that any entity
# that uses the works is notified of this instrument.
#
# DISCLAIMER: THE WORKS ARE WITHOUT WARRANTY.


01 OP_ALL+OP_AX, OP_ALL+OP_IMM			;add,adc,and,or,sub, ...
02 OP_ALL+OP_RM, OP_ALL+OP_IMM			;add,adc,and,or,mov,sub, ...
03 OP_1632+OP_RM, OP_IMMS8				;add,adc,and,or,sub, ...
04 OP_ALL+OP_RM, OP_ALL+OP_R			;add,adc,and,or,mov,sub, ...
05 OP_ALL+OP_R, OP_ALL+OP_RM			;add,adc,and,or,mov,sub, ...
06 OP_16+OP_RM, OP_16+OP_R				;arpl
07 OP_1632+OP_R, OP_FAR_M, OP_1632+OP_M		; LxS (lds, les, lss, lfs, lgs)
08 OP_1632+OP_R, OP_1632+OP_RM			;cmovxx, bsf, bsr, imul, lar, lsl
09 OP_32+OP_R_ADD						;bswap
0A OP_1632+OP_RM, OP_1632+OP_R			;bt, btr, bts, btc
0B OP_1632+OP_RM, OP_IMM8				;bt, btr, bts, btc
0C OP_NEAR, OP_REL1632				;call/jmp near, jxx
0D OP_FAR, OP_FARIMM				;call/jmp seg:ofs
0E OP_FAR_REQUIRED, OP_FAR_M, OP_1632_DEFAULT+OP_M	; call/jmp far [mem]
0F OP_M64								;cmpxchg8b, fild, fistp
10 OP_ALL+OP_RM							;dec, inc, imul, ...
11 OP_1632+OP_R_ADD						;dec, inc, pop, push
12 OP_16+OP_IMM, OP_IMM8				;enter
13 OP_MFLOAT							;fld, fst, ...
14 OP_MDOUBLE							;fld, fst, ...
15 OP_ST, OP_STI						;fdiv, fmul, fcmovxx,...
16 OP_STI, OP_ST						;fadd, fdiv, ...
17 OP_1CHK, OP_STI, OP_ST				;fxxxp
18 OP_32+OP_M							;fixxx
19 OP_16+OP_M							;fixxx
1A OP_M80								;fbld, fbstp
1B OP_STI								;fld, fst, ...
1C OP_1CHK, OP_STI						;f[u]comx
1D OP_M80								;fld, fstp
1E OP_MXX								;[l|s][g|i]dt, fsave, frstor, fldenv
1F OP_16+OP_AX							;fstsw
20 OP_1632+OP_R, OP_1632+OP_RM, OP_IMMS8			;imul
21 OP_1632+OP_R_MOD, OP_1632+OP_R, OP_IMMS8			;imul
22 OP_1632+OP_R, OP_1632+OP_RM, OP_1632+OP_IMM		;imul
23 OP_1632+OP_R_MOD, OP_1632+OP_R, OP_1632+OP_IMM	;imul
24 OP_ALL+OP_AX, OP_IMM8				;in al|ax|eax, imm
25 OP_ALL+OP_AX, OP_DX					;in al|ax|eax, dx
26 OP_3									;INT 3
27 OP_IMM8								;INT xx, AAD xx, AAM xx
28 OP_SHORT, OP_REL8				;jxx, loopxx, jmp short
29 OP_1632+OP_RM				;push [mem]
2A OP_16+OP_RM							;ltr, lldt, lmsw, verr, verw, str
2B OP_1632+OP_RM, OP_SEGREG				;mov <reg>|[mem], <segr>
2C OP_SEGREG, OP_1632+OP_RM				;mov <segr>,<reg>|[mem]
2D OP_ALL+OP_AX, OP_ALL+OP_MOFFS		;mov al|ax|eax, [mem]
2E OP_ALL+OP_MOFFS, OP_ALL+OP_AX		;mov [mem], al|ax|eax
2F OP_8+OP_R_ADD, OP_8+OP_IMM			;mov <reg>, <imm>
30 OP_1632+OP_R_ADD, OP_1632+OP_IMM		;mov <reg>, <imm>
31 OP_1632+OP_R, OP_SHOSIZ, OP_8+OP_RM	;movzx, movsx
32 OP_1632+OP_R, OP_SHOSIZ, OP_16+OP_RM	;movzx, movsx
33 OP_IMM8, OP_ALL+OP_AX				;out imm, al|ax|eax
34 OP_DX, OP_ALL+OP_AX					;out dx,al|ax|eax
35 OP_1632+OP_RM						;pop [mem]
36 OP_SHOSIZ, OP_1632_DEFAULT+OP_IMM			;push <imm>
37 OP_SHOSIZ, OP_IMMS8					;push byte ptr <imm>
38 OP_ALL+OP_RM, OP_1					;shl, shr, rol, ror, ...
39 OP_ALL+OP_RM, OP_CL					;shl, shr, rol, ror, ...
3A OP_ALL+OP_RM, OP_IMM8				;shl, shr, rol, ror, ...
3B OP_16+OP_IMM							;ret x, retf x
3C OP_8+OP_RM							;setxx
3D OP_1632+OP_RM, OP_1632+OP_R, OP_IMM8	;shld, shrd
3E OP_1632+OP_RM, OP_1632+OP_R, OP_CL	;shld, shrd
3F OP_1632+OP_AX, OP_1632+OP_R_ADD		;xchg
40 OP_1632+OP_R_ADD, OP_1632+OP_AX		;xchg
# The next six must be in machine order.
41 OP_ES
42 OP_CS
43 OP_SS
44 OP_DS
45 OP_FS
46 OP_GS
47 OP_32+OP_R_MOD, OP_CR				;mov <reg>, CRx
48 OP_CR, OP_32+OP_R_MOD				;mov CRx, <reg>
49 OP_32+OP_R_MOD, OP_DR				;mov <reg>,DRx
4A OP_DR, OP_32+OP_R_MOD				;mov DRx, <reg>
4B OP_32+OP_R_MOD, OP_TR				;mov <reg>,TRx
4C OP_TR, OP_32+OP_R_MOD				;mov TRx,<reg>
4D OP_MMX, OP_32+OP_RM					; movd mm,r/m32
4E OP_32+OP_RM, OP_MMX					; movd r/m32,mm
4F OP_MMX, OP_64+OP_RM					; movq mm,mm/m64; most MMX instrs
50 OP_64+OP_RM, OP_MMX					; movq mm/m64,mm

52 OP_MMX_MOD, OP_IMM8					; psllw,lld,llq,raw,rad,rlw,rld,rlq
#53 OP_64+OP_M, OP_MMX				; SSE	; movntq m64,mm
#54 OP_32+OP_R, OP_MMX_MOD, OP_IMM8		; SSE	; pextrw
#55 OP_MMX, OP_16+OP_RM, OP_IMM8		; SSE	; pinsrw
#56 OP_32+OP_R, OP_MMX_MOD			; SSE	; pmovmskb
#57 OP_MMX, OP_64+OP_RM, OP_IMM8		; SSE	; pshufw
#58 OP_MMX, OP_MMX_MOD				; SSE	; maskmovq
#59 OP_MMX, OP_32+OP_RM, OP_IMM8		; SSE	; pinsrw (nominal r32 specification)
60 OP_1632+OP_R, OP_MXX				; lea
61 OP_8+OP_RM, OP_8+OP_IMM			;add,adc,and,or,mov,sub, ...
62 OP_NEAR, OP_1632_DEFAULT+OP_RM		; call, jmp
63 OP_1632+OP_R, OP_DOUBLE_M, OP_1632+OP_M	; bound
